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d a t a sh eet product specification supersedes data of 2000 feb 09 2000 jul 31 integrated circuits uda1334ats low power audio dac with pll
2000 jul 31 2 nxp semiconductors product specification low power audio d ac with pll uda1334ats contents 1 features 1.1 general 1.2 multiple format data interface 1.3 dac digital features 1.4 advanced audio configuration 1.5 pll system clock generation 2 applications 3 general description 4 ordering information 5 quick reference data 6 block diagram 7 pinning 8 functional description 8.1 system clock 8.1.1 audio mode 8.1.2 video mode 8.2 interpolation filter 8.3 noise shaper 8.4 filter stream dac 8.5 power-on reset 8.6 feature settings 8.6.1 digital interface format select 8.6.2 de-emphasis control 8.6.3 mute control 9 limiting values 10 handling 11 thermal characteristics 12 quality specification 13 dc characteristics 14 ac characteristics 14.1 analog 14.2 timing 15 application information 16 package outline 17 soldering 17.1 introduction to soldering surface mount packages 17.2 reflow soldering 17.3 wave soldering 17.4 manual soldering 17.5 suitability of surface mount ic pa ckages for wave and reflow soldering methods 18 data sheet status 19 disclaimers
2000 jul 31 3 nxp semico nductors product specification low power audio dac with pll uda1334ats 1 features 1.1 general ? 2.4 to 3.6 v power supply voltage ? on-board pll to generate the internal system clock: ? operates as an asynchronous dac, regenerating the internal clock from the ws signal (called audio mode) ? generates audio related system clock (output) based on 32, 48 or 96 khz sampling frequency (called video mode). ? integrated digital filter plus dac ? supports sample frequencies from 16 to 100 khz in asynchronous dac mode ? no analog post filtering required for dac ? easy application ? ssop16 package. 1.2 multiple format data interface ? i 2 s-bus and lsb-justified format compatible ? 1f s input data rate. 1.3 dac digital features ? digital de-emphasis for 44.1 khz sampling frequency ? mute function. 1.4 advanced audio configuration ? high linearity, wide dynamic range and low distortion. 1.5 pll system clock generation ? integrated low jitter pll for use in applicatio ns in which there is digital audio data present but the system cannot provide an audio related system clock. this mode is called audio mode. ? the pll can generate 256 48 khz and 384 48 khz from a 27 mhz input clock. this mode is called video mode. 2 applications this audio dac is excellentl y suitable for digital audio portable application, specially in applic ations in which an audio related system clock is not present. 3 general description the uda1334ats is a single chip 2 channel digital-to-analog converter employing bitstream conversion techniques, including an on-board pll. the extremely low power consumption and low voltage requirements make the device eminently suitable for use in low-voltage low-power portable digital audio equipment which incorporates a playback function. the uda1334ats supports the i 2 s-bus data format with word lengths of up to 24 bits and the lsb-justified serial data format with word lengths of 16, 20 and 24 bits. the uda1334ats has basic features such as de-emphasis (44.1 khz sampling frequency, only supported in audio mode) and mute. 4 ordering information type number package name description version uda1334ats ssop16 plastic shrink small outline package; 16 leads; body width 4.4 mm sot369-1
2000 jul 31 4 nxp semico nductors product specification low power audio dac with pll uda1334ats 5 quick reference data note 1. the output voltage of the dac scales proportionally to the power supply voltage. symbol parameter condi tions min. typ. max. unit supplies v dda dac analog supply voltage 2.4 3.0 3.6 v v ddd digital supply voltage 2.4 3.0 3.6 v i dda dac analog supply current audio mode ? 3.5 ? ma video mode ? 3.5 ? ma i ddd digital supply current audio mode ? 2.5 ? ma video mode ? 4.5 ? ma t amb ambient temperature ? 40 ? +85 c digital-to-analog converter (v dda =v ddd =3.0v) v o(rms) output voltage (rms value) at 0 db (fs) digital input; note 1 ? 900 ? mv (thd+n)/s total harmonic distortion-plus-noise to signal ratio f s = 44.1 khz; at 0 db ?? 90 ? db f s = 44.1 khz; at ? 60 db; a-weighted ?? 40 ? db f s =96khz; at 0db ?? 85 ? db f s =96khz; at ? 60 db; a-weighted ?? 38 ? db s/n signal-to-noise ratio f s = 44.1 khz; code = 0; a-weighted ? 100 ? db f s =96khz; code=0; a-weighted ? 98 ? db cs channel separation ? 100 ? db power dissipation (at f s =44.1khz) p power dissipation audio mode ? 18 ? mw video mode ? 24 ? mw
2000 jul 31 5 nxp semico nductors product specification low power audio dac with pll uda1334ats 6 block diagram handbook, full pagewidth mgl973 dac uda1334ats noise shaper interpolation filter de-emphasis 14 15 dac 6 digital interface pll 16 3 2 1 4 5 11 7 13 12 voutr bck v ssa ws voutl datai v dda v ddd 10 pll0 v ref(dac) v ssd sfor0 sysclk/pll1 8 mute 9 deem/clkout sfor1 fig.1 block diagram.
2000 jul 31 6 nxp semico nductors product specification low power audio dac with pll uda1334ats 7 pinning note 1. because of test issues these pads are not 5 v tolerant and both pads should be at power supply voltage level or at a maximum of 0.5 v above that level. symbol pin pad type description bck 1 5 v tolerant digital input pad bit clock input ws 2 5 v tolerant digital input pad word select input datai 3 5 v tolerant digital input pad serial data input v ddd 4 digital supply pad digital supply voltage v ssd 5 digital ground pad digital ground sysclk/pll1 6 5 v tolerant digital input pa d system clock input in video mode/pll mode control 1 input in audio mode sfor1 7 5 v tolerant digital input pad serial format select 1 input mute 8 5 v tolerant digital input pad mute control input deem/clkout 9 5 v tolerant digital input/output pad de-emphasis control input in audio mode/clock output in video mode pll0 10 3-level input pad; note 1 pll mode control 0 input sfor0 11 digital input pad; note 1 serial format select 0 input v ref(dac) 12 analog pad dac reference voltage v dda 13 analog supply pad dac analog supply voltage voutl 14 analog output pad dac output left v ssa 15 analog ground pad dac analog ground voutr 16 analog output pad dac output right handbook, halfpage uda1334ats mgl972 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 voutr bck v ssa ws voutl datai v dda v ddd v ref(dac) v ssd sfor0 sysclk/pll1 pll0 sfor1 deem/clkout mute fig.2 pin configuration.
2000 jul 31 7 nxp semico nductors product specification low power audio dac with pll uda1334ats 8 functional description 8.1 system clock the uda1334ats incorporates a pll capable of generating the system clock. the uda1334ats can operate in 2 modes: ? it operates as an asynchronous dac, which means the device regenerates the internal clocks using a pll from the incoming ws signal. this mode is called audio mode. ? it generates the internal cl ocks from a 27 mhz clock input, based on 32, 48 and 96 khz sampling frequencies. this mode is called video mode. in video mode, the digital audio input is slave, which means that the system must generate the bck and ws signals from the output clock available at pin clkout of the uda1334ats. the digital audio signals should be frequency locked to the clkout signal. remarks: 1. the ws edge must fall on the negative edge of the bck at all times for proper operation of the digital i/o data interface 2. for lsb-justified fo rmats it is important to have a ws signal with a duty factor of 50%. 8.1.1 a udio mode audio mode is enabled by setting pin pll0 to low. de-emphasis can be activated via pin deem/clkout according to table 5. in audio mode, pin sysclk/p ll1 is used to set the sampling frequency range as given in table 1. table 1 sampling frequency range in audio mode 8.1.2 v ideo mode in video mode, the master clock is a 27 mhz external clock (as is available in video environment). a clock-out signal is generated at pin deem/clkout. the output frequency can be selected using pin pll0. the output frequency is either 12.228 mhz (256 48 khz) with pin pll0 being at mid level or 18.432 mhz (384 48 khz) with pin pll0 being high, as given in table 2. table 2 clock output selection in video mode notes 1. the supported sampling frequencies are: 96, 48 and 24 khz or 64, 32 and 16 khz. 2. the supported sampling frequencies are: 96, 48 and 24 khz; 72 and 36 khz or 32 khz. 8.2 interpolation filter the interpolation digital filter interpolates from 1f s to 64f s by cascading fir filters (see table 3). table 3 interpolation filter characteristics 8.3 noise shaper the 5th-order noise shaper operates at 64f s . it shifts in-band quantization noise to frequencies well above the audio band. this noise shaping technique enables high signal-to-noise ratios to be achieved. the noise shaper output is converted into an analog signal using a filter stream dac (fsdac). sysclk/pll1 selection low f s =16to50khz high f s =50to100khz pll0 selection mid 12.228 mhz clock; note 1 high 18.432 mhz clock; note 2 low audio mode item condition value (db) pass-band ripple 0f s to 0.45f s 0.02 stop band >0.55f s ? 50 dynamic range 0f s to 0.45f s >114
2000 jul 31 8 nxp semico nductors product specification low power audio dac with pll uda1334ats 8.4 filter stream dac the fsdac is a semi-digital reconstruction filter that converts the 1-bit data stream of the noise shaper to an analog output voltage. the filter coefficients are implemented as current sources and are summed at virtual ground of the output operational amplifier. in this way very high signal-to-noise performance and low clock jitter sensitivity is achieved. no post filter is needed due to the inherent filter function of the dac. on-board amplifiers convert the fsdac output curr ent to an output voltage signal capable of driving a line output. the output voltage of the fsdac scales proportionally to the power supply voltage. 8.5 power-on reset the uda1334ats has an internal power-on reset circuit (see fig.3) which resets the test control block. the reset time (see fig.4) is determined by an external capacitor which is connected between pin v ref(dac) and ground. the reset time should be at least 1 s for v ref(dac) < 1.25 v. when v dda is switched off, the device will be reset again for v ref(dac) <0.75 v. during the reset time the system clock should be running. handbook, halfpage v dda v ref(dac) 3.0 v 13 12 mgt015 uda1334ats c1 > 10 f reset circuit 50 k 50 k fig.3 power-on reset circuit. handbook, halfpage 3.0 v ddd (v) 1.5 0 t 3.0 v dda (v) 1.5 0 t 3.0 v ref(dac) (v) 1.5 1.25 0.75 0 t mgl984 > 1 s fig.4 power-on reset timing.
2000 jul 31 9 nxp semico nductors product specification low power audio dac with pll uda1334ats 8.6 feature settings 8.6.1 d igital interface format select the digital audio interface formats (see fig.5) can be selected via pins sfor1 and sfor0 as shown in table 4. for the digital audio interface holds that the bck frequency can be maximum 64 times ws frequency. the ws signal must change at the negative edge of the bck signal for all digital audio formats. table 4 data format selection 8.6.2 d e - emphasis control this function is only available in audio mode. in that case, pin deem/clkout can be used to activate the digital de-emphasis for 44.1 khz as given in table 5. table 5 de-emphasis control (audio mode) 8.6.3 m ute control the output signal can be soft muted by setting pin mute to high as given in table 6. table 6 mute control sfor1 sfor0 input format low low i 2 s-bus input low high lsb-justified 16 bits input high low lsb-justified 20 bits input high high lsb-justified 24 bits input deem/clkout function low de-emphasis off high de-emphasis on mute function low mute off high mute on
2000 jul 31 10 nxp semiconductors product specification low power audio dac with pll uda1334ats ha ndbook, full pagewidth mgs75 2 16 b5 b6 b7 b8 b9 b10 left lsb-justified format 24 bits w s b ck d ata right 15 18 17 20 19 22 21 23 24 21 b3 b4 msb b2 b23 lsb 16 b5 b6 b7 b8 b9 b10 15 18 17 20 19 22 21 23 24 21 b3 b4 msb b2 b23 lsb 16 msb b2 b3 b4 b5 b6 left lsb-justified format 20 bits w s b ck d ata right 15 18 17 20 19 2 1 b19 lsb 16 msb b2 b3 b4 b5 b6 15 18 17 20 19 2 1 b19 lsb 16 msb b2 left lsb-justified format 16 bits w s b ck d ata right 15 2 1 b15 lsb 16 msb b2 15 2 1 b15 lsb msb msb b2 2 1 > = 8 12 3 left i 2 s-bus format ws bck d ata right 3 > = 8 msb b2 fig.5 digital audio formats.
2000 jul 31 11 nxp semico nductors product specification low power audio dac with pll uda1334ats 9 limiting values in accordance with the absolute maximum rating system (iec 60134). notes 1. all supply connections must be made to the same power supply. 2. esd behaviour is tested according to jedec ii standard. 3. short-circuit test at t amb =0 c and v dda = 3 v. dac operation after short-circuiting cannot be warranted. 10 handling inputs and outputs are protected against electrostatic discharg e in normal handling. however, to be totally safe, it is desirable to take normal precautions appropriate to handling mos devices. 11 thermal characteristics 12 quality specification in accordance with ?snw-fq-611-e? . 13 dc characteristics v ddd =v dda =3.0v; t amb =25 c; r l =5k ; all voltages with respect to ground (pins v ssa and v ssd ); unless otherwise specified. symbol parameter conditions min. max. unit v dd supply voltage note 1 ? 4.0 v t xtal(max) maximum crystal temperature ? 150 c t stg storage temperature ? 65 +125 c t amb ambient temperature ? 40 +85 c v es electrostatic handling voltage human body model; note 2 ? 2000 +2000 v machine model; note 2 ? 250 +250 v i sc(dac) short-circuit current of dac note 3 output short-circuited to v ssa ? 450 ma output short-circuited to v dda ? 300 ma symbol parameter conditions value unit r th(j-a) thermal resistance from junction to ambient in free air 145 k/w symbol parameter conditions min. typ. max. unit supplies v dda dac analog supply voltage note 1 2.4 3.0 3.6 v v ddd digital supply voltage note 1 2.4 3.0 3.6 v i dda dac analog supply current audio mode ? 3.5 ? ma video mode ? 3.5 ? ma i ddd digital supply current audio mode ? 2.5 ? ma video mode ? 4.5 ? ma
2000 jul 31 12 nxp semico nductors product specification low power audio dac with pll uda1334ats notes 1. all supply connections must be made to the same external power supply unit. 2. when the dac drives a capacitive load above 50 pf, a series resistance of 100 must be used to prevent oscillations in the output operational amplifier. 14 ac characteristics 14.1 analog v ddd =v dda =3.0v; f i =1khz; t amb =25 c; r l =5k ; all voltages with respect to ground (pins v ssa and v ssd ); unless otherwise specified. digital input pins: ttl compatible v ih high-level input voltage 2.0 ? 5.0 v v il low-level input voltage ? 0.5 ? +0.8 v ? i li ? input leakage current ?? 1 a c i input capacitance ?? 10 pf 3-level input: pin pll0 v ih high-level input voltage 0.9v ddd ? v ddd +0.5 v v im mid-level input voltage 0.4v ddd ? 0.6v ddd v v il low-level input voltage ? 0.5 ? +0.5 v digital output pins v oh high-level output voltage i oh = ? 2ma 0.85v ddd ?? v v ol low-level output voltage i ol =2ma ?? 0.4 v dac v ref(dac) reference voltage with respect to v ssa 0.45v dd 0.5v dd 0.55v dd v r o(ref) output resistance on pin v ref(dac) ? 25 ? k i o(max) maximum output curr ent (thd + n)/s < 0.1%; r l =5k ? 1.6 ? ma r l load resistance 3 ?? k c l load capacitance note 2 ?? 50 pf symbol parameter conditions typ. unit dac v o(rms) output voltage (rms value) at 0 db (fs) digital input; note 1 900 mv v o unbalance between channels 0.1 db (thd + n)/s total harmonic distortion-plus-noise to signal ratio f s =44.1khz; at 0db ? 90 db f s =44.1khz; at ? 60 db; a-weighted ? 40 db f s =96khz; at 0db ? 85 db f s =96khz; at ? 60 db; a-weighted ? 38 db symbol parameter conditions min. typ. max. unit
2000 jul 31 13 nxp semico nductors product specification low power audio dac with pll uda1334ats note 1. the output voltage of the dac scales proportionally to the analog power supply voltage. 14.2 timing v ddd =v dda = 2.4 to 3.6 v; t amb = ? 20 to +85 c; r l =5k ; all voltages with re spect to ground (pins v ssa and v ssd ); unless otherwise specified; note 1. note 1. the typical value of the timing is specified for a sampling frequency of 44.1 khz. s/n signal-to-noise ratio f s = 44.1 khz; code = 0; a-weighted 100 db f s = 96 khz; code = 0; a-weighted 98 db cs channel separation 100 db psrr power supply rejection ratio f ripple = 1 khz; v ripple = 30 mv (p-p) 60 db symbol parameter conditions min. typ. max. unit output clock timing in video mode (see fig.6) t sys output clock cycle f o = 12.228 mhz ? 81.38 ? ns f o = 18.432 mhz ? 54.25 ? ns t cwl output clock low time f o = 12.228 mhz 0.3t sys ? 0.7t sys ns f o = 18.432 mhz 0.4t sys ? 0.6t sys ns t cwh output clock high time f o = 12.228 mhz 0.3t sys ? 0.7t sys ns f o = 18.432 mhz 0.4t sys ? 0.6t sys ns serial input data timing (see fig.7) f bck bit clock frequency ?? 64f s hz t bckh bit clock high time 50 ?? ns t bckl bit clock low time 50 ?? ns t r rise time ?? 20 ns t f fall time ?? 20 ns t su(datai) set-up time data input 20 ?? ns t h(datai) hold time data input 0 ?? ns t su(ws) set-up time word select 20 ?? ns t h(ws) hold time word select 10 ?? ns symbol parameter conditions typ. unit
2000 jul 31 14 nxp semico nductors product specification low power audio dac with pll uda1334ats handbook, full pagewidth mgr984 t sys t cwh t cwl fig.6 output clock timing. handbook, full pagewidth mgl880 t f t h(ws) t su(ws) t su(datai) t h(datai) t bckh t bckl t cy(bck) t r ws bck datai fig.7 serial interface timing.
2000 jul 31 15 nxp semico nductors product specification low power audio dac with pll uda1334ats 15 application information handbook, full pagewidth mgl971 uda1334ats 6 sysclk/pll1 1 bck 2 ws 3 datai 14 voutl r3 100 r1 220 k 16 voutr r4 100 r2 220 k 7 sfor1 11 sfor0 9 deem/clkout 10 pll0 8 mute 47 f (16 v) c4 47 f (16 v) c3 left output right output 12 v ref(dac) c7 47 f (16 v) c8 100 nf (63 v) 4 5 v ddd v ssd r6 1 digital supply voltage c6 15 13 v ssa v dda r7 1 c9 47 f (16 v) c10 100 nf (63 v) 100 nf (63 v) analog supply voltage c5 47 f (16 v) c1 10 nf (63 v) 10 nf (63 v) c2 fig.8 audio mode application diagram. in audio mode, the system does not need to supply a system clock.
2000 jul 31 16 nxp semico nductors product specification low power audio dac with pll uda1334ats handbook, full pagewidth mgl974 47 r5 uda1334ats 6 sysclk/pll1 27 mhz clock 1 bck 2 ws 3 datai 14 voutl r3 100 r1 220 k 16 voutr r4 100 r2 220 k 7 sfor1 11 sfor0 9 audio clock i 2 s-bus (master) deem/clkout 10 pll0 8 mute mpeg decoder 47 f (16 v) c4 47 f (16 v) c3 left outp ut right outp ut 12 v ref(dac) c7 47 f (16 v) c8 100 nf (63 v) 4 5 v ddd v ssd r6 1 digital supply voltage c6 15 13 v ssa v dda r7 1 c9 47 f (16 v) c10 100 nf (63 v) 100 nf (63 v) analog supply voltage c5 47 f (16 v) c1 10 nf (63 v) 10 nf (63 v) c2 fig.9 video mode application diagram. in video mode, a clock output signal is gen erated by the uda1334ats which is master for the audio signals in the system; the di gital audio interface is slave, which means the system must generate the bc k and ws signal from the uda1334ats output clock.
2000 jul 31 17 nxp semico nductors product specification low power audio dac with pll uda1334ats 16 package outline unit a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v references outline version european projection issue date iec jedec jeita mm 0.15 0.00 1.4 1.2 0.32 0.20 0.25 0.13 5.3 5.1 4.5 4.3 0.65 6.6 6.2 0.65 0.45 0.48 0.18 10 0 o o 0.13 0.2 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.2 mm maximum per side are not included. 0.75 0.45 1 sot369-1 mo-152 99-12-27 03-02-19 w m a a 1 a 2 b p d y h e l p q detail x e z e c l v m a x (a ) 3 a 0.25 18 16 9 pin 1 index 0 2.5 5 mm scale s sop16: plastic shrink small outline package; 16 leads; body width 4.4 mm sot369 -1 a max. 1.5
2000 jul 31 18 nxp semico nductors product specification low power audio dac with pll uda1334ats 17 soldering 17.1 introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our ?data handbook ic26; integrated circuit packages? (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering is not always suitable for surface mount ics, or for printed-circuit boards with high population densities. in these situations reflow soldering is often used. 17.2 reflow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215to250 c. the top-surface temperature of the packages should preferable be kept below 230 c. 17.3 wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specif ically developed. if wave soldering is used the following conditions must be observed for optimal results: ? use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. ? for packages with leads on two sides and a pitch (e): ? larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; ? smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. ? for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will elim inate the need for removal of corrosive residues in most applications. 17.4 manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limit ed to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
2000 jul 31 19 nxp semico nductors product specification low power audio dac with pll uda1334ats 17.5 suitability of surface m ount ic packages for wave and reflow soldering methods notes 1. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the ?data handbook ic26; integrated circuit packages; section: packing methods? . 2. these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 4. wave soldering is only suitable for lqfp, tqfp and qfp packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. package soldering method wave reflow (1) bga, lfbga, sqfp, tfbga not suitable suitable hbcc, hlqfp, hsqfp, hsop, htqfp, htssop, sms not suitable (2) suitable plcc (3) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (3)(4) suitable ssop, tssop, vso not recommended (5) suitable
2000 jul 31 20 nxp semico nductors product specification low power audio dac with pll uda1334ats 18 data sheet status notes 1. please consult the most recently issued document before initiating or completing a design. 2. the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. the latest pr oduct status information is available on the internet at url http://www.nxp.com. document status (1) product status (2) definition objective data sheet development this document contains data from the objective specification for product development. preliminary data sheet qualification this document contains data from the preliminary specification. product data sheet production this document contains the product specification. 19 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semico nductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without lim itation - lost profits, lost savings, business interrup tion, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semi conductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in life support, lif e-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for incl usion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are fo r illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assi stance with ap plications or customer product design. it is customer?s sole responsibility to dete rmine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as for the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applications and products using nxp semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect.
2000 jul 31 21 nxp semico nductors product specification low power audio dac with pll uda1334ats limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will c ause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeat ed exposure to lim iting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the general terms and conditions of comme rcial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconductors products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from national authorities. quick reference data ? the quick refere nce data is an extract of the product data given in the limiting values and characteristics sections of this document, and as such is not complete, exhaustive or legally binding. non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semiconductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semicond uctors? warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond nxp semiconductors? standard warranty and nxp semiconductors? product specifications.
nxp semiconductors provides high performance mixed signal and standard product solutions that leverage its leadi ng rf, analog, power management, interface, security and digital processing expertise contact information for additional information please visit: http://www.nxp.com for sales offices addresses send e-mail to: salesaddresses@nxp.com ? nxp b.v. 2010 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reli able and may be changed without notice. no liabilit y will be accepted by the publisher for any consequen ce of its use. publicat ion thereof d oes not con vey nor imply any license under patent- or other industrial or intellectual property rights. customer notification this data sheet was changed to reflect the new company name nxp semiconductors, including new legal definitions and disclaimers. no changes were made to the technical content, except for package outline drawings which were updated to the latest version. printed in the netherlands 753503/25/02/pp 22 date of release: 2000 jul 31 document order number: 9397 750 07238

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